Tips & Tricks

e-café #12 : L’outil de post traitement ESI PLAYER™

Découvrez comment exporter et exploiter les résultats de ProCAST™ ou QuikCAST™ dans l’interface ESI-PLAYER™

e-Café #7 - Maillage volumique avec Visual-CAST™ 16.0

Créez le maillage volumique à l’aide de la fonction Grid Definition dans Visual-CAST™ 16.0

e-café #5- Pilotage du refroidissement par thermocouple à l’aide de ProCAST™ et QuikCAST™

Pilotage du refroidissement par thermocouple à l’aide de ProCAST™ et QuikCAST™

e-café #4- Modélisation de l’emballage (Wrap) à l’aide de ProCAST™

Modélisation de l’emballage (Wrap) à l’aide de ProCAST™

e-café #3- Modélisation des opérations de poteyage et soufflage à l’aide Quik CAST™

Modélisation des opérations de poteyage et soufflage à l’aide Quik CAST™

Using a template CDL file for quick case set up in CFD-CADalyzer

If your simulations with CFD-CADalyzer typically include the same or similar type of physics, materials and boundary conditions then you can make the case setup process very efficient and quick with the use of a template file - a CDL file that includes the typical simulation settings.

Internal injection lines modeling

Internal injection lines on a shell model (i.e. made of internal element edges) are not supported by the parallel solver.

Direct Opening of a mesh

The creation of a RTM project and loading of the model mesh is usually done in 2 steps.

Coupling between PAM-FORM and PAM-RTM: multiple part mapping

Coupling between PAM-FORM 2G and PAM-RTM is done through a .DSY file. Thus, pre-forming process is simulated with PAM-FORM 2G and resulting fiber orientations that will affect permeabilities are transferred to PAM-RTM model setup.

Parallel processing

“To pull a bigger wagon, it is easier to add more horses than to grow a gigantic horse.” This paraphrased quotation nicely expresses the basic concept of parallel processing. The speed of sequential computers has been doubling every eighteen months, according to Moore’s law. However, at any given time, that speed is limited by the state of the art in integrated circuit design and manufacturing. To circumvent that limitation, it is possible to split a given computationally intensive task among multiple processors working simultaneously.